Editor's Note: In Part 2 of this series,consultant and ASIC designer Tom Moxoncovered several trends in virtual silicon prototying design flows.In this installment of the series he'll show how to link ...

The use of IP (intellectual property) as basic building blocks is an established practice for SoC designs. Most IP is developed without chip-level context and very little knowledge about physical ...

For the past several months we’ve been looking into what it takes to write good RTL code. We’ve looked at how to write register-driven RTL, how to write combinatorial processes, and how to write state ...

HARDWARE DESIGN is a process of refining an idea from a highly abstract form to a concrete, physical implementation. Along the way, a design is continually transformed from a given state of ...

FPGA complexity is exploding, and RTL synthesis is running out of steam. With its Precision Physical Synthesis tool, Mentor Graphics melds the best of both RTL and physical synthesis. The result is ...