Electronic Design

HPC And “Big Data” Apps Tap Floating-Point Number Compression

Floating-point values contain three fields: a sign bit, exponent bits, and significand or mantissa bits. The IEEE-754 floating-point number format defined a common floating-point format that most ...
EDN

Tutorial: Floating-point arithmetic on FPGAs

[Editor's note: For an intro to fixed-point math, see Fixed-Point DSP and Algorithm Implementation. For a comparison of fixed- and floating-point hardware, see Fixed vs. floating point: a surprisingly ...
Electronic Design

64-bit Floating Point Coprocessor Supports IEEE 754 Calculations

The uM-FPU64 floating point coprocessor chip provides support for IEEE 754-compatible, 64-bit floating point and integer calculations, expanded digital I/O, and analog input capabilities as well as ...
Semiconductor Engineering

Achieving Numerical Precision And Design Customization With Flexible Floating-Point IP

As defined by the IEEE 754 standard, floating-point values are represented in three fields: a significand or mantissa, a sign bit for the significand and an exponent field. The exponent is a biased ...
Design-Reuse

Tachyum Successfully Runs LINPACK on FPGA With IEEE 754-2019 Compliant FPU

LAS VEGAS, November 29, 2022 – Tachyum™ continues to advance towards production-ready status of its universal processor after reaching its latest milestone of running LINPACK benchmarks using ...